Commit Graph

55 Commits

Author SHA1 Message Date
florian
0316a7697f * arm thumb1: several fixes for the internal assembler writer
git-svn-id: trunk@48675 -
2021-02-14 17:52:26 +00:00
pierre
e50a388f30 Change CLZ support for arm32 minimal CPU to armv5t according to ARM documentation in arminst.dat
git-svn-id: trunk@47207 -
2020-10-26 13:40:45 +00:00
florian
867df5362c + basic Neon support in the assembler writer
+ make use of VEOR if possible to clear VFP registers

git-svn-id: trunk@42682 -
2019-08-13 22:12:51 +00:00
Jeppe Johansen
750567f8e3 Added T2 form of LDR/STR for SP relative forms.
git-svn-id: trunk@42169 -
2019-06-03 22:10:49 +00:00
florian
4db5478acc + support msr regf,reg32 on arm in the internal assembler
git-svn-id: trunk@41128 -
2019-01-29 20:38:51 +00:00
florian
4f5f3c4a09 + support for vmov.xx vreg,#imm on arm
git-svn-id: trunk@39297 -
2018-06-24 12:39:59 +00:00
florian
c3a0a4e252 + support fmrrd/fmdrr, resolves #32398
git-svn-id: trunk@38270 -
2018-02-17 16:32:11 +00:00
florian
c564acd378 * fix assembling of vfnm*
git-svn-id: trunk@33189 -
2016-03-06 13:33:29 +00:00
Jeppe Johansen
9d1646e2a8 Add support for writeback in RFE and SRS instructions.
git-svn-id: trunk@32749 -
2015-12-26 23:53:11 +00:00
Jeppe Johansen
439027a8de Add most pre-UAL VFP instruction forms.
Add fused mac instructions for VFPv4.

git-svn-id: trunk@30187 -
2015-03-14 14:59:13 +00:00
Jeppe Johansen
73abf5e630 Merge from armiw branch.
Update ARM internal assembler to support most ARM, Thumb and Thumb-2 instructions.
Changed generation of VFP instructions to use UAL mnemonics.
Added divided and unified assembler syntax support to ARM assembly reader.

git-svn-id: trunk@30181 -
2015-03-13 19:22:27 +00:00
Jeppe Johansen
3d7dce81fe Make MRS and MSR use the right encoding on Thumb architectures.
Set regnumber_count_bsstart to 128 to be able to search all registers.

git-svn-id: branches/laksen/armiw@30150 -
2015-03-08 17:30:38 +00:00
Jeppe Johansen
47dbec3111 Rebase to trunk revision
git-svn-id: branches/laksen/armiw@29708 -
2015-02-15 16:08:18 +00:00
sergei
9cc0bdd6b9 + Missing part of internal ARM assembler, Mantis #26588. I'm not setting it as default for arm-wince yet, because testing reveals several points in generic code that need adjustments.
git-svn-id: trunk@29588 -
2015-01-30 22:45:05 +00:00
Jeppe Johansen
572076fc4d Add MSR/MRS for ARMv6M/7M.
Fix bug in FPA LFM/SFM.
Add usermode handling of LDM/STM.

git-svn-id: branches/laksen/armiw@29371 -
2015-01-02 13:24:03 +00:00
Jeppe Johansen
f963ff1b5b Add CPSxx instructions, and some missing FPA instructions.
git-svn-id: branches/laksen/armiw@29368 -
2015-01-01 21:17:21 +00:00
Jeppe Johansen
ff7af306df Add FPA support.
git-svn-id: branches/laksen/armiw@29366 -
2015-01-01 11:18:04 +00:00
Jeppe Johansen
49346b3041 Fix SWI as a pseudo instruction.
Add VFPv2/3 instruction entries for Thumb2.

git-svn-id: branches/laksen/armiw@29356 -
2014-12-29 11:34:34 +00:00
Jeppe Johansen
9a482d5281 Refactor and secure some immediate operand encodings.
Add some system mode entries, udiv/sdiv in arm mode, and fix bugs in ldrh/strh.

git-svn-id: branches/laksen/armiw@29353 -
2014-12-28 21:41:06 +00:00
Jeppe Johansen
3ad03491ed Add Neg as a pseudo instruction, and fix RRX pseudo code expansion.
Split some of the thumb code emission rules to make it easier to specify short-cut notations.

git-svn-id: branches/laksen/armiw@29345 -
2014-12-27 17:44:30 +00:00
Jeppe Johansen
6fff181679 Add support for TBB/TBH instructions.
Precisize rules for selection of thumb instructions.
Add short-cut notation support for most simple Thumb2 instructions ( add r1,#4 instead of add r1,r1,#4 ).

git-svn-id: branches/laksen/armiw@29343 -
2014-12-27 16:00:06 +00:00
Jeppe Johansen
71cdedea82 Add missing NOP, and B instruction forms.
Move ThumbFunc flag from section to symbol.
Make .w forms optional the other way around. If .w is explicitly put on an instruction the assembler should always chose a wide form.

git-svn-id: branches/laksen/armiw@29341 -
2014-12-27 13:23:02 +00:00
Jeppe Johansen
cc418eef74 Added unified assembler syntax mode so it can be selected with $ASMMODE.
Fixed bug in Mov instruction.
Added initial scanning of IT/LastInIT detection for proper instruction selection.
Disabled "wide" format flag detection again for now.

git-svn-id: branches/laksen/armiw@29338 -
2014-12-27 00:19:09 +00:00
Jeppe Johansen
9683102813 BL/BLX in thumb mode is a long composed instruction in Thumb as well as Thumb2
git-svn-id: branches/laksen/armiw@29333 -
2014-12-26 23:10:34 +00:00
Jeppe Johansen
5c3093a937 Add most non-VFP Thumb-2 instruction entries for the ARM internal writer.
git-svn-id: branches/laksen/armiw@29329 -
2014-12-26 18:35:15 +00:00
Jeppe Johansen
3cb9b30165 Added full 16-bit Thumb support to the ARM internal writer.
git-svn-id: branches/laksen/armiw@29326 -
2014-12-25 19:33:14 +00:00
Jeppe Johansen
901275b4a1 Switch back to emitting BLX instructions and fix calculation of constant offsets(should rarely/never happen).
Add missing fields to other elf targets.

git-svn-id: branches/laksen/armiw@29286 -
2014-12-14 16:28:35 +00:00
Jeppe Johansen
6c4dbf5a84 Change emission of pre-reloc BLX to BL.
git-svn-id: branches/laksen/armiw@29278 -
2014-12-12 23:12:53 +00:00
Jeppe Johansen
387824c1ee Added some APSR register bitmask definitions.
Fixed a bunch of instruction encodings by comparing bulks of handwritten tests to binutils assembled versions.
Fixed emission of regsets of S and D registers above 15.
Fixed assembler reader for RRX shiftmode.
There can be a size postfix after a condition code in UAL assembler syntax. This has been added to the assembler reader.

git-svn-id: branches/laksen/armiw@29277 -
2014-12-12 22:23:44 +00:00
Jeppe Johansen
414bfba2b2 Emitted instruction was B instead of BL for BL/BLX.
git-svn-id: branches/laksen/armiw@29262 -
2014-12-11 22:11:10 +00:00
Jeppe Johansen
0b5bcdf439 Modify fixup of BL/BLX instructions and ensure proper form is generated.
git-svn-id: branches/laksen/armiw@29260 -
2014-12-11 21:50:44 +00:00
Jeppe Johansen
eb3eaab54b Fix some small encoding bugs.
git-svn-id: branches/laksen/armiw@29250 -
2014-12-10 23:28:09 +00:00
Jeppe Johansen
d023c63ad0 Add a lot of instruction table entries and missing instructions for support of most ARM32 mode instructions from ARMv4 up ARMv7A.
Add some VFP registers.
Rebuilt tables.
Added a lot of VFPv3 and Advanced SIMD(not supported yet) oppostfixes.
Implemented code in aasmcpu to generate binary code from the instructions. Only ARM32 supported so far.

git-svn-id: branches/laksen/armiw@29246 -
2014-12-10 20:38:23 +00:00
Károly Balogh
b67e4fb8b3 added the ADR ARM pseudo instruction to instruction list
git-svn-id: trunk@25936 -
2013-11-05 13:16:33 +00:00
florian
ac4a6accd3 + SVC instruction
git-svn-id: trunk@23980 -
2013-03-24 20:22:06 +00:00
florian
086ae4b999 Merge r22905 and r22906
git-svn-id: trunk@23773 -
2013-03-10 10:45:34 +00:00
florian
1eeeb309c7 * intial armv6m support, it is not working yet, constant pool insertation and conditional branch fixup is not working yet
git-svn-id: trunk@23682 -
2013-03-03 12:20:10 +00:00
Jeppe Johansen
666332385d Added coprocessor registers, and support for 6 operands(MCR/MRC instructions, etc)
git-svn-id: branches/laksen/arm-embedded@22778 -
2012-10-19 18:23:14 +00:00
Jeppe Johansen
0087661fb5 Added FPv4_d16 FPU instructions, and a few extra registers
git-svn-id: branches/laksen/arm-embedded@22596 -
2012-10-08 20:04:14 +00:00
Jeppe Johansen
9ec9b44784 Add CBNZ/CBZ instructions
Create preliminary Thumb-2 PeepHoleOptPass2 code, hacked together from the ARM mode code
Added a number of simple size optimizations for common Thumb-2 instructions

git-svn-id: branches/laksen/arm-embedded@22590 -
2012-10-08 12:30:00 +00:00
florian
b2813abec2 + patch by Bernd to add the push/pop mnemonic for arm/thumb-2, resolves #22041
git-svn-id: trunk@21310 -
2012-05-15 18:52:09 +00:00
Jonas Maebe
ef2d665a50 + support for REV and several other ARMv6/ARMv6T2+ opcodes (mantis #21888)
git-svn-id: trunk@21285 -
2012-05-13 12:14:26 +00:00
florian
2eb39c8843 * patch by Jeppe Johansen to support jumptable generation for case nodes on arm/thumb-2, resolves #19502
git-svn-id: trunk@18233 -
2011-08-16 22:39:00 +00:00
Jonas Maebe
bbf0e35a51 + Support for ARM CPS/CPSIE/CPSID instructions and mode flag bitfield
operand (patch by Jeppe Johansen, mantis #18334)

git-svn-id: trunk@16750 -
2011-01-11 16:02:51 +00:00
Jonas Maebe
d1538ab023 o added ARM VPFv2/VFPv3 support:
+ RTL support:
      o VFP exceptions are disabled by default on Darwin,
        because they cause kernel panics on iPhoneOS 2.2.1 at least
      o all denormals are truncated to 0 on Darwin, because disabling
        that also causes kernel panics on iPhoneOS 2.2.1 (probably
        because otherwise denormals can also cause exceptions)
    * set softfloat rounding mode correctly for non-wince/darwin/vfp
      targets
    + compiler support: only half the number of single precision
      registers is available due to limitations of the register
      allocator
    + added a number of comments about why the stackframe on ARM is
      set up the way it is by the compiler
    + added regtype and subregtype info to regsets, because they're
      also used for VFP registers (+ support in assembler reader)
    + various generic support routines for dealing with floating point
      values located in integer registers that have to be transferred to
      mm registers (needed for VFP)
    * renamed use_sse() to use_vectorfpu() and also use it for
      ARM/vfp support
    o only superficially tested for Linux (compiler compiled with -Cpvfpv6
      -Cfvfpv2 works on a Cortex-A8, no testsuite run performed -- at least
      the fpu exception handler still needs to be implemented), Darwin has
      been tested more thoroughly
  + added ARMv6 cpu type and made it default for Darwin/ARM
  + ARMv6+ implementations of atomic operations using ldrex/strex
  * don't use r9 on Darwin/ARM, as it's reserved under certain
    circumstances (don't know yet which ones)
  * changed C-test object files for ARM/Darwin to ARMv6 versions
  * check in assembler reader that regsets are not empty, because
    instructions with a regset operand have undefined behaviour in that
    case
  * fixed resultdef of tarmtypeconvnode.first_int_to_real in case of
    int64->single type conversion
  * fixed constant pool locations in case 64 bit constants are generated,
    and/or when vfp instructions with limited reach are present

  WARNING: when using VFP on an ARMv6 or later cpu, you *must* compile all
    code with -Cparmv6 (or higher), or you will get crashes. The reason is
    that storing/restoring multiple VFP registers must happen using
    different instructions on pre/post-ARMv6.

git-svn-id: trunk@14317 -
2009-12-03 22:46:30 +00:00
florian
515774b864 * merged armthum branch
-- Zusammenführen der Unterschiede zwischen Projektarchiv-URLs in ».«:
U    rtl/arm/setjump.inc
A    rtl/arm/thumb2.inc
U    rtl/arm/divide.inc
A    rtl/embedded/arm/stm32f103.pp
U    rtl/inc/system.inc
U    compiler/alpha/cgcpu.pas
U    compiler/sparc/cgcpu.pas
U    compiler/i386/cgcpu.pas
U    compiler/ncgld.pas
U    compiler/powerpc/cgcpu.pas
U    compiler/avr/cgcpu.pas
U    compiler/aggas.pas
U    compiler/powerpc64/cgcpu.pas
U    compiler/x86_64/cgcpu.pas
U    compiler/cgobj.pas
U    compiler/psystem.pas
U    compiler/aasmtai.pas
U    compiler/m68k/cgcpu.pas
U    compiler/ncgutil.pas
U    compiler/rautils.pas
U    compiler/arm/raarmgas.pas
U    compiler/arm/armatts.inc
U    compiler/arm/cgcpu.pas
U    compiler/arm/armins.dat
U    compiler/arm/rgcpu.pas
U    compiler/arm/cpubase.pas
U    compiler/arm/agarmgas.pas
U    compiler/arm/cpuinfo.pas
U    compiler/arm/armop.inc
U    compiler/arm/narmadd.pas
U    compiler/arm/aoptcpu.pas
U    compiler/arm/armatt.inc
U    compiler/arm/aasmcpu.pas
U    compiler/systems/t_embed.pas
U    compiler/psub.pas
U    compiler/options.pas

git-svn-id: trunk@13801 -
2009-10-04 09:03:44 +00:00
florian
c5816c500a + support for nop, msr and mrs instructions
git-svn-id: trunk@12609 -
2009-01-26 14:18:42 +00:00
florian
7a4f76f262 + VFP instructions for arm
git-svn-id: trunk@11863 -
2008-10-04 19:25:34 +00:00
florian
90a3b20b48 Merged revisions 10168 via svnmerge from
http://svn.freepascal.org/svn/fpc/branches/avr

........
  r10168 | florian | 2008-02-03 10:56:10 +0100 (Sun, 03 Feb 2008) | 1 line
  
  * properties set
........

git-svn-id: trunk@10169 -
2008-02-03 09:59:37 +00:00
florian
e8c48ab561 + eDSP instructions for arm
git-svn-id: trunk@6425 -
2007-02-11 15:10:27 +00:00